Walchand Institute Of Technlogy
Microprocessors notes by
Mr.R.S.Satalagaon Assistant Professor E&TC Dept
Why to study Microprocessors?
Almost all the modern electronic goods which
can be used to make arithmetic and logic operations ,i.e in the computation
field,any mechanical work(eg washing machines,microwave oven, water level
controllers etc) make usage of the microprocessors.Thus microprocessors are
excessively used in embedded systems.Further the concept of microprocessor can
be extended to microcontroller with some of the external devices attached to
it.The invention of microprocessor has revolutionized the communication field and also in some of the digital processing
techniques.
Brief history of 8085.
The
idea of making a general purpose chip which can provide solution to many
different arithmetic operations was first made by an INTEL company employee by
name Ted Hoff. Thus INTEL coined the
name MICROPROCESSOR to that chip and In
the year 1971 a 4-bit microprocessor was first introduced to the world.The 4
bit microprocessor was made using 2300
number of transistors with the initial clock speed of 108KHz with address bus of
length 10-bits and data bus of length of 4-bits.The maximum memory that it can
address is 640 bytes.Later in the year 1976 again INTEL company released 8-bit microprocessor made by 6500 number of transistors with initial clock speed of 5MHz,consisting
of 16-bit address bus and 8-bit data bus that has the maximum addressable
memory of 64Kbytes.
General Architecture
of a Microcomputer System.The
hardware of a microcomputer system can be divided into four functional
sections: the Input unit,MicroprocessingUnit, Memory Unit, and Output Unit See Fig. 1 below.
Figure1.
Microprocessor Unit (MPU) is the
heart of a microcomputer. A microprocessor is a general purpose processing unit
built into a single integrated circuit (IC).
The Microprocessor
is the part of the microcomputer that executes instructions of the program and
processes data. It is responsible for performing all arithmetic operations and
making the logical decisions initiated by the computer’s program. In addition
to arithmetic and logic functions, the MPU controls overall system operation.
Input and Output units are the means by which the MPU
communicates with the outside world. Input unit: keyboard, mouse, scanner,
etc. Output unit: monitor, printer,
etc. Memory unit: o Primary: is normally
smaller in size and is used for temporary storage of active information.
Typically ROM, RAM.
Secondary:
is normally larger in size and used for long-term storage of information. Like
Hard disk, Floppy, CD, etc.
2.
Types of Microprocessors Microprocessors generally is categorized in terms of
the maximum number of binary bits in the data they process – that I, their word
length. Over time, five standard data widths have evolved for microprocessors:
4-bit, 8-bit, 16-bit, 32-bit, 64-bit. There are so many manufacturers of
Microprocessors, but only two companies have been produces popular
microprocessors: Intel and Motorola. Table 1 lists some of types
that belong to these companies (families) of microprocessors.
Table 1: Some Types of
Microprocessors.
Note
that the 8086 has data bus width of 16-bit, and it is able to address 1Megabyte
of memory. It is important to note that 80286, 80386,80486, and
Pentium-Pentium4 microprocessors are upward compatible with the 8086
Architecture. This mean that 8086/8088 code will run on the 80286, 80386,
80486, and Pentium Processors, but the reverse in not true if any of the new
instructions are in use. Beside to the general-purpose
microprocessors, these families involve another type called special-purpose microprocessors
that used in embedded control
applications. This type of embedded microprocessors is called microcontroller. The 8080, 8051, 8048, 80186, 80C186XL
are some examples of microcontroller.
3. Number Systems.
For
Microprocessors, information such as instruction,
data and addresses are described with
numbers. The types of numbers are not normally the decimal numbers we are
familiar with; instead, binary and hexadecimal numbers are used. Table 2 shows
Binary and Hexadecimal representations for some decimal numbers.
Generally,
Binary numbers are expressed in fixed length either:
8-bit called Byte .
16-bit
called Word.
32-bit called Double Word.
Table 2: Binary, and Hexadecimal representation of some numbers
The salient features of 8085 Microprocessor are as follows
• It
is a 8 bit microprocessor.
• It
is manufactured with N-MOS technology.
• It
has 16-bit address bus and hence can address up to 216 =
65536 bytes (64KB) memory locations through A0-A15 .
•
The first 8 lines of address bus and 8 lines of data bus are multiplexed AD0 – AD7 .
•
Data bus is a group of 8 lines D0 – D7 .
• It
supports external interrupt request.
• A
16 bit program counter (PC)
• A
16 bit stack pointer (SP)
•
Six 8-bit general purpose register arranged in pairs: BC, DE, HL.
• It
requires a signal +5V power supply and operates at 3.2 MHZ single phase clock.
• It
is enclosed with 40 pins DIP (Dual in line package).
The 8085 Architecture
and the bus system
Control Unit
Generates signals within uP to carry out the instruction,
which has been decoded. In reality
causes certain connections between blocks of the
microprocessor to be opened or closed, so that data goes where it is required,
and so that ALU operations occur.
Arithmetic Logic Unit
The ALU
performs the actual numerical and logic operation such as ‘add’, ‘subtract’,
‘AND’,
‘OR’, etc. Uses data from memory and from Accumulator to
perform arithmetic. Always stores result of operation in Accumulator.
Registers
The 8085/8080A-programming model includes six registers, one
accumulator, and one flag
register, as shown in Figure. In addition, it has two 16-bit
registers: the stack pointer and the
program counter. They are described briefly as follows. The
8085/8080A has six general-purposeregisters to store 8-bit data; these are
identified as B,C,D,E,H, and L as shown in the figure above. They can be
combined as register pairs - BC, DE, and HL - to perform some 16-bit
operations. The programmer can use these
registers to store or copy data into the registers by using data copy
instructions.
Accumulator.
The accumulator is an 8-bit register that is a part of
arithmetic/logic unit (ALU). This register is used to store 8-bit data and to
perform arithmetic and logical operations. The result of an
operation is stored in the accumulator. The accumulator is
also identified as register A.
Flags
The ALU includes five flip-flops, which are set or reset
after an operation according to data
conditions of the result in the accumulator and other
registers. They are called Zero(Z), Carry
(CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags;
they are listed in the Table and their
bit positions in the flag register are shown in the Figure below. The
most commonly used flags are Zero, Carry, and Sign. The microprocessor uses
these flags to test data conditions. For example, after an addition of two
numbers, if the sum in the accumulator id larger than eight bits, the flip-flop
uses to indicate a carry -- called the Carry flag (CY) – is set to one. When an
arithmetic operation results in zero, the flip-flop called the Zero(Z) flag is
set to one. The first Figure shows an 8-bit register, called the flag register,
adjacent to the accumulator.
However, it is not used as a register; five bit positions
out of eight are used to store the outputs of the five flip-flops. The flags
are stored in the 8-bit register so that the programmer can examine these flags
(data conditions) by accessing the register through an instruction. These flags
have critical importance in the decision-making process of the microprocessor.
The conditions (set or reset) of the flags are tested through the software
instructions. For example, the instruction JC (Jump on Carry) is implemented to
change the sequence of a program when CY flag is set. The thorough
understanding of flag is essential in writing assembly language programs.
Program Counter (PC)
This 16-bit registers deals with sequencing the execution of
instructions. This register is a
memory pointer. Memory locations have 16-bit addresses, and
that is why this is a 16-bit
register.
The microprocessor uses this register to sequence the
execution of the instructions.
The function of the program counter is to point to the
memory address from which the next byte is to be fetched. When a byte (machine
code) is being fetched, the program counter is
incremented by one to point to the next memory location.
Stack Pointer (SP)
The stack pointer is also a 16-bit register used as a memory
pointer. It points to a memory
location in R/W memory, called the stack. The beginning of
the stack is defined by loading 16- bit address in the stack pointer. The stack
concept is explained in the chapter "Stack and
Subroutines”.
Instruction
Register/Decoder
Temporary store for the current instruction of a program.
Latest instruction sent here from
memory prior to execution. Decoder then takes instruction
and ‘decodes’ or interprets the
instruction. Decoded instruction then passed to next stage.
Memory Address Register
Holds address, received from PC, of next program
instruction. Feeds the address bus with
addresses of location of the program under execution.
Control Generator
Generates signals within uP to carry out the instruction
which has been decoded. In reality causes certain connections between blocks of
the uP to be opened or closed, so that data goes where it is required, and so
that ALU operations occur.
RegisteControl Generator
Selector
This block controls the use of the register stack in the
example. Just a logic circuit which
switches between different registers in the set will receive
instructions from Control Unit.
General Purpose Registers
Microprocessor
requires extra registers for versatility, Can be used to store
additional data during a program.
More complex processors may have a variety of differently
named registers.
Microprogramming
How the MP does knows what an instruction means, especially
when it is only a binary number?
The microprogram in a MP/MC is written by the chip designer
and tells the MP/MC the meaning of each instruction MP/MC can then carry out
operation.
2. 8085 System Bus
Typical system uses a number of busses, collection of wires,
which transmit binary numbers, one bit per wire. A typical microprocessor
communicates with memory and other devices (input and output) using three
busses: Address Bus, Data Bus and Control Bus.
Address Bus
One wire for each bit, therefore 16 bits = 16 wires. Binary
number carried alerts memory to
‘open’ the designated box. Data (binary) can then be put in
or taken out.The Address Bus
consists of 16 wires, therefore 16 bits. Its
"width" is 16 bits. A 16 bit binary number allows 216 different
numbers, or 32000 different numbers, ie 0000000000000000 up to 1111111111111111.
Because memory consists of boxes, each with a unique
address, the size of the address bus
determines the size of memory, which can be used. To
communicate with memory the
microprocessor sends an address on the address bus, eg
0000000000000011 (3 in decimal), to the memory. The memory the selects box
number 3 for reading or writing data. Address bus is unidirectional, ie numbers
only sent from microprocessor to memory, not other way.
Data Bus
Data Bus: carries ‘data’, in binary form, between μP and other external units, such as
memory.
Typical size is 8 or 16 bits. Size determined by size of
boxes in memory and μP size helps
determine performance of MP. The Data Bus typically consists of 8 wires. Therefore, 28
combinations of binary digits. Data bus used to transmit
"data", ie information, results of
arithmetic, etc, between memory and the microprocessor. Bus
is bi-directional. Size of the data bus determines what arithmetic can be done.
If only 8 bits wide then largest number is 11111111 (255 in decimal).
Therefore, larger numbers have to be broken down into chunks of 255. This slows
microprocessor. Data Bus also carries instructions from memory to the
microprocessor. Size of the bus therefore limits the number of possible
instructions to 256, each specified by a separate number.
Control Bus
Control Bus are various lines which have specific functions
for coordinating and controlling MP operations. Eg: Read/NotWrite line, single
binary digit. Control whether memory is being ‘written to’ (data stored in mem)
or ‘read from’ (data taken out of mem) 1
= Read, 0 = Write.
May also include clock line(s) for timing/synchronising,
‘interrupts’, ‘reset’ etc. Typically μP has 10 control lines. Cannot function correctly without
these vital control signals. The Control Bus carries control signals partly
unidirectional, partly bi-directional. Control signals are things like
"read or write". This tells memory that we are either reading from a location, specified on the address bus, or writing to a location specified. Various other signals to control and
coordinate the operation of the system.
Modern day microprocessors, like 80386, 80486 have much
larger busses. Typically 16 or 32 bit busses, which allow larger number of
instructions, more memory location, and faster arithmetic.
Microcontrollers organized along same lines, except: because
microcontrollers have memory etc inside the chip, the busses may all be
internal. In the microprocessor the three busses are external to the chip
(except for the internal data bus). In case of external busses, the chip
connects to the busses via buffers, which are simply an electronic connection
between external bus and the internal data bus.
3. 8085 Pin diagram.
4.8085 Pin description.
Properties
1.Single + 5V Supply
2.4 Vectored Interrupts (One is Non Maskable)
3.Serial In/Serial Out Port
4.Decimal, Binary, and Double Precision Arithmetic
5.Direct Addressing Capability to 64K bytes of memory
The Intel 8085A is a
new generation, complete 8 bit parallel central processing unit
(CPU). The 8085A
uses a multiplexed data bus. The address is split between the 8bit address bus
and the 8bit data bus. Figures are at the end of the document.
The following describes the function of each pin:
A6 - A1s (Output 3 State)
Address Bus; The most significant 8 bits of the memory
address or the 8 bits of the I/0 address,3 stated during Hold and Halt modes.
AD0 - AD7 (Input/Output 3state)
Multiplexed Address/Data Bus; Lower 8 bits of the memory
address (or I/0 address) appear on the bus during the first clock cycle of a
machine state. It then becomes the data bus during the second and third clock
cycles. 3 stated during Hold and Halt modes.
ALE (Output)
Address Latch Enable: It occurs during the first clock cycle
of a machine state and enables the address to get latched into the on chip
latch of peripherals. The falling edge of ALE is set to guarantee setup and
hold times for the address information. ALE can also be used to strobe the
status information. ALE is never 3stated.
SO, S1 (Output)
Data Bus Status. Encoded status of the bus cycle:
S1 S0
O O HALT
0 1 WRITE
1 0 READ
1 1 FETCH
S1 can be used as an advanced R/W status.
RD (Output 3state)
READ; indicates the selected memory or 1/0 device is to be
read and that the Data
Bus is available for the data transfer.
WR (Output 3state)
WRITE; indicates the data on the Data Bus is to be written
into the selected memory or 1/0
location. Data is set up at the trailing edge of WR. 3stated
during Hold and Halt modes.
READY (Input)
If Ready is high during a read or write cycle, it indicates
that the memory or peripheral is ready to send or receive data. If Ready is
low, the CPU will wait for Ready to go high before
completing the read or write cycle.
HOLD (Input)
HOLD; indicates that another Master is requesting the use of
the Address and Data Buses. The CPU, upon receiving the Hold request. will
relinquish the use of buses as soon as the completion of the current machine
cycle. Internal processing can continue. The processor can regain the buses
only after the Hold is removed. When the Hold is acknowledged, the Address,
Data, RD, WR, and IO/M lines are 3stated.
HLDA (Output)
HOLD ACKNOWLEDGE; indicates that the CPU has received the
Hold request and
that it will relinquish the buses in the next clock cycle.
HLDA goes low after the Hold
request is removed. The CPU takes the buses one half clock
cycle after HLDA goes low.
INTR (Input)
INTERRUPT REQUEST; is used as a general purpose interrupt.
It is sampled only during the
next to the last clock cycle of the instruction. If it is
active, the Program Counter (PC) will be
inhibited from incrementing and an INTA will be issued.
During this cycle a RESTART or
CALL instruction can be inserted to jump to the interrupt
service routine. The INTR is enabled and disabled by software. It is disabled
by Reset and immediately after an interrupt is accepted.
INTA (Output)
INTERRUPT ACKNOWLEDGE; is used instead of (and has the same
timing as) RD during the Instruction cycle after an INTR is accepted. It can be
used to activate the
8259 Interrupt chip or some other interrupts port.
RST 5.5
RST 6.5 - (Inputs)
RST 7.5
RESTART INTERRUPTS; These three inputs have the same timing
as I NTR except
they cause an internal RESTART to be automatically inserted.
RST 7.5 ~~ Highest Priority
RST 6.5
RST 5.5 o Lowest Priority
The priority of these interrupts is ordered as shown above.
These interrupts have a higher priority than the INTR.
TRAP (Input)
Trap interrupt is a nonmaskable restart interrupt. It is
recognized at the same time as
INTR. It is unaffected by any mask or Interrupt Enable. It
has the highest priority of any
interrupt.
RESET IN (Input)
Reset sets the Program Counter to zero and resets the
Interrupt Enable and HLDA flipflops.
None of the other flags or registers (except the instruction
register) are affected The CPU is held in the reset condition as long as Reset
is applied.
RESET OUT (Output)
Indicates CPlJ is being reset. Can be used as a system
RESET. The signal is synchronized to the
processor clock.
X1, X2 (Input)
Crystal or R/C network connections to set the internal clock
generator X1 can also be an external
clock input instead of a crystal. The input frequency is
divided by 2 to give the internal operating
frequency.
CLK (Output)
Clock Output for use as a system clock when a crystal or R/
C network is used as an input to the CPU. The period of CLK is twice the X1, X2
input period.
IO/M (Output) IO/M
indicates whether the Read/Write is to memory or l/O Tristated during Hold and
Halt modes.
SID (Input)
Serial input data line The data on this line is loaded into
accumulator bit 7 whenever a RIM
instruction is executed.
SOD (output)
Serial output data line. The output SOD is set or reset as
specified by the SIM instruction.
Vcc
+5 volt supply.
Vss
Ground Reference.
5. 8085 Functional
Description
The 8085A is a complete 8 bit parallel central processor. It
requires a single +5 volt supply. Its basic clock speed is 3 MHz thus improving
on the present 8080's performance with higher
system speed. Also it is designed to fit into a minimum
system of three IC's: The CPU, a RAM/IO, and a ROM or PROM/IO chip.
The 8085A uses a multiplexed Data Bus. The address is split
between the higher 8bit
Address Bus and the lower 8bit Address/Data Bus. During the
first cycle the address is sent out.The lower 8bits are latched into the
peripherals by the Address Latch Enable (ALE). During the rest of the machine cycle
the Data Bus is used for memory or l/O data.
The 8085A provides RD, WR, and lO/Memory signals for bus
control. An Interrupt Acknowledge signal (INTA) is also provided. Hold, Ready,
and all Interrupts are synchronized.
The 8085A also provides serial input data (SID) and serial
output data
(SOD) lines for simple serial interface. In addition to
these features, the 8085A has three
maskable, restart interrupts and one non-maskable trap
interrupt. The 8085A provides RD, WR and IO/M signals for Bus control.
Status Information
Status information is directly available from the 8085A. ALE
serves as a status strobe. The status is partially encoded, and provides the
user with advanced timing of the type of bus transfer being done. IO/M cycle
status signal is provided directly also. Decoded So, S1 Carries the following
status information.
HALT, WRITE, READ, FETCH
S1 can be interpreted as R/W in all bus transfers. In the
8085A the 8 LSB of address are
multiplexed with the data instead of status. The ALE line is
used as a strobe to enter the lower half of the address into the memory or
peripheral address latch. This also frees extra pins for expanded interrupt
capability.
Interrupt and Serial l/O
The8085A has5 interrupt inputs: INTR, RST5.5, RST6.5, RST
7.5, and TRAP. INTR is identical in function to the 8080 INT. Each of the three
RESTART inputs, 5.5, 6.5. 7.5, has a
programmable mask. TRAP is also a RESTART interrupt except
it is nonmaskable. The three
RESTART interrupts cause the internal execution of RST
(saving the program counter in the
stack and branching to the RESTART address) if the
interrupts are enabled and if the interrupt mask is not set. The non-maskable
TRAP causes the internal execution of a RST independent of the state of the
interrupt enable or masks. The interrupts are arranged in a fixed priority that
determines which interrupt is to be recognized if more than one is pending as
follows: TRAP highest priority, RST 7.5, RST 6.5, RST 5.5, INTR lowest priority
This priority scheme does not take into account the priority of a routine that
was started by a higher priority interrupt. RST 5.5 can interrupt a RST 7.5
routine if the interrupts were re-enabled before the end of the RST 7.5 read
and write pulse lengths so that the 8085A can be used with slow memory. Hold
causes the
CPU to relingkuish the bus when it is through with it by
floating the Address and Data Buses.
routine. The TRAP interrupt is useful for catastrophic
errors such as power failure or bus error.
The TRAP input is recognized just as any other interrupt but
has the highest priority. It is not
affected by any flag or mask. The TRAP input is both edge
and level sensitive.
Basic System Timing
The 8085A has a multiplexed Data Bus. ALE is used as a
strobe to sample the lower 8bits of
address on the Data Bus. Figure 2 shows an instruction
fetch, memory read and l/ O write cycle (OUT). Note that during the l/O write
and read cycle that the l/O port address is copied on both the upper and lower
half of the address. As in the 8080, the READY line is used to extend the read
and write pulse lengths so that the 8085A can be used with slow memory. Hold
causes the CPU to relingkuish the bus when it is through with it by floating
the Address and Data Buses.
System Interface
8085A family includes memory components, which are directly
compatible to the 8085A CPU.
For example, a system consisting of the three chips, 8085A,
8156, and
8355 will have the following features:
· 2K Bytes ROM
· 256 Bytes RAM
· 1 Timer/Counter
· 4 8bit l/O Ports
· 1 6bit l/O Port
· 4 Interrupt Levels
· Serial In/Serial Out Ports
In addition to standard l/O, the memory mapped I/O offers an
efficient l/O addressing technique.
With this technique, an area of memory address space is
assigned for l/O address, thereby, using the memory address for I/O manipulation.
The 8085A CPU can also interface with the standard memory that does not have
the multiplexed address/data bus.
6. The 8085 Programming
Model
In the previous tutorial we described the 8085
microprocessor registers in reference to the
internal data operations. The same information is repeated
here briefly to provide the continuity and the context to the instruction set
and to enable the readers who prefer to focus initially on the programming
aspect of the microprocessor. The 8085 programming model includes six
registers, one accumulator, and one flag register, as shown in Figure. In
addition, it has two 16-bit registers: the stack pointer and the program
counter. They are described briefly as follows.
Registers
The 8085 has six general-purpose registers to store 8-bit
data; these are identified as B,C,D,E,H,
and L as shown in the figure. They can be combined as
register pairs - BC, DE, and HL - to
perform some 16-bit operations. The programmer can use these
registers to store or copy data
into the registers by using data copy instructions.
Accumulator
The accumulator is an 8-bit register that is a part of
arithmetic/logic unit (ALU). This register is
used to store 8-bit data and to perform arithmetic and
logical operations. The result of an
operation is stored in the accumulator. The accumulator is
also identified as register A.
ACCUMULATOR A (8) FLAG
REGISTER
B (8)
D (8)
H (8)
Stack Pointer (SP) (16)
Program Counter (PC) (16)
C
(8)
E
(8)
L
(8)
Data
Bus Address Bus
8 Lines Bidirectional 16 Lines unidirectional
Flags
The ALU includes five flip-flops, which are set or reset
after an operation according to data
conditions of the result in the accumulator and other
registers. They are called Zero(Z), Carry
(CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags;
their bit positions in the flag register are shown in the Figure below. The
most commonly used flags are Zero, Carry, and Sign. The microprocessor uses
these flags to test data conditions.
For example, after an addition of two numbers, if the sum in
the accumulator id larger than eight bits, the flip-flop uses to indicate a
carry -- called the Carry flag (CY) – is set to one. When an arithmetic
operation results in zero, the flip-flop called the Zero(Z) flag is set to one.
The first Figure shows an 8-bit register, called the flag register, adjacent to
the accumulator. However, it is not used as a register; five bit positions out
of eight are used to store the outputs of the five flip-flops. The flags are
stored in the 8-bit register so that the programmer can examine these flags
(data conditions) by accessing the register through an instruction. These flags
have critical importance in the decision-making process of the microprocessor.
The conditions (set or reset) of the flags are tested through the software
instructions. For example, the instruction JC (Jump on Carry) is implemented to
change the sequence of a program when CY flag is set. The thorough
understanding of flag is essential in writing assembly language programs.
Program Counter (PC)
This 16-bit register deals with sequencing the execution of
instructions. This register is a
memory pointer. Memory locations have 16-bit addresses, and
that is why this is a 16-bit
register.
The microprocessor uses this register to sequence the execution
of the instructions. The function of the program counter is to point to the
memory address from which the next byte is to be fetched. When a byte (machine
code) is being fetched, the program counter is incremented by one to point to
the next memory location
Stack Pointer (SP)
The stack pointer is also a 16-bit register used as a memory
pointer. It points to a memory
location in R/W memory, called the stack. The beginning of
the stack is defined by loading 16- bit address in the stack pointer. This programming
model will be used in subsequent tutorials to examine how these registers are
affected after the execution of an instruction.
D7 D6 D5 D4 D3 D2 D1 D0 S Z AC P CY.
7. The 8085 Addressing
Modes
The instructions MOV B, A or MVI A, 82H are to copy data
from a source into a destination. In these instructions the source can be a
register, an input port, or an 8-bit number (00H to FFH).
Similarly, a destination can be a register or an output
port. The sources and destination are
operands. The various formats for specifying operands are
called the ADDRESSING MODES.
For 8085, they are:
1. Immediate addressing.
2. Register addressing.
3. Direct addressing.
4. Indirect addressing.
Immediate addressing
Data is present in the instruction. Load the immediate data
to the destination provided.
Example: MVI R,data
Register addressing
Data is provided through the registers.
Example: MOV Rd, Rs
Direct addressing
Used to accept data from outside devices to store in the
accumulator or send the data stored in
the accumulator to the outside device. Accept the data from
the port 00H and store them into the
accumulator or Send the data from the accumulator to the
port 01H.
Example: IN 00H or OUT 01H
Indirect Addressing
This means that the Effective Address is calculated by the
processor. And the contents of the
address (and the one following) is used to form a second
address. The second address is where the data is stored. Note that this
requires several memory accesses; two accesses to retrieve the 16-bit address
and a further access (or accesses) to retrieve the data which is to be loaded
into the register.
8. Instruction Set
Classification
Definition:An instruction
is a binary pattern designed inside a
microprocessor to perform a specific function. The entire group of instructions,
called the instruction set, determines what functions the microprocessor can perform.
These instructions can be classified into the following five functional
categories: data transfer (copy) operations, arithmetic operations, logical
operations,branching operations, and machine-control operations.
Data Transfer (Copy)
Operations
This group of instructions copy data from a location called
a source to another location called a destination, without modifying the
contents of the source. In technical manuals, the term data transfer is used for this copying function. However, the term transfer is misleading; it creates the impression that the contents
of the source are destroyed when, in fact, the contents are retained without
any modification.
The various types of data transfer (copy) are listed below
together with examples of each type
Types
Examples
1. Between Registers.
1. Copy the contents of the register B into register D.
2. Specific data byte to a register or a memory location.
2. Load register B with the data byte 32H.
3. Between a memory location and a register.
3. From a memory location 2000H to register B.
4. Between an I/O device and the accumulator.
4.From an input keyboard to the accumulator.
Arithmetic Operations
These instructions perform arithmetic operations such as
addition, subtraction, increment, and
decrement.
Addition - Any 8-bit number, or the contents of a register or the
contents of a memory location can be added to the contents of the accumulator
and the sum is stored in the accumulator.
NOTE:No two other 8-bit registers can be added directly (e.g.,
the contents of register B cannot be added. directly to the contents of the
register C). The instruction DAD is an exception; it adds 16-bit data directly
in register pairs.
Subtraction - Any 8-bit number, or the contents of a register, or the
contents of a memory
location can be subtracted from the contents of the
accumulator and the results stored in the
accumulator. The subtraction is performed in 2's compliment,
and the results if negative, are
expressed in 2's complement. No two other registers can be
subtracted directly.
Increment/Decrement - The 8-bit contents of a register or a memory location can be
incremented or decrement by 1. Similarly, the 16-bit
contents of a register pair (such as BC) can
be incremented or decrement by 1. These increment and
decrement operations differ from
addition and subtraction in an important way; i.e., they can
be performed in any one of the
registers or in a memory location.
Logical Operations
These instructions perform various logical operations with
the contents of the accumulator.
AND, OR Exclusive-OR - Any 8-bit number, or the contents of a register, or of a
memory
location can be logically ANDed, Ored, or Exclusive-ORed
with the contents of the accumulator.
The results are stored in the accumulator.
Rotate-
Each bit in the accumulator can be shifted either left or right to the next
position.
Compare-
Any 8-bit number, or the contents of a register, or a memory location can be
compared for equality, greater than, or less than, with the
contents of the accumulator.
Complement - The contents of the accumulator can be complemented. All 0s
are replaced by 1s and all 1s are replaced by 0s.
Branching Operations
This group of instructions alters the sequence of program
execution either conditionally or
unconditionally.
Jump - Conditional
jumps are an important aspect of the decision-making process in the
programming. These instructions test for a certain
conditions (e.g., Zero or Carry flag) and alter the program sequence when the
condition is met. In addition, the instruction set includes an instruction
called unconditional jump.
Call, Return, and Restart - These instructions change the sequence of a program either
by
calling a subroutine or returning from a subroutine. The
conditional Call and Return instructions also can test condition flags.
Machine Control
Operations
These instructions control machine functions such as Halt,
Interrupt, or do nothing.
The microprocessor operations related to data manipulation
can be summarized in four functions:
1. Copying
data
2. Performing
arithmetic operations
3. Performing
logical operations
4. Testing
for a given condition and alerting the program sequence
Some important aspects of the instruction set are noted
below:
1. In data
transfer, the contents of the source are not destroyed; only the contents of
the
destination are changed. The data copy instructions do not
affect the flags.
2. Arithmetic
and Logical operations are performed with the contents of the accumulator, and
the results are stored in the accumulator (with some expectations). The flags
are affected according to the results.
3. Any
register including the memory can be used for increment and decrement.
4. A program
sequence can be changed either conditionally or by testing for a given data
condition.
8. Instruction Format
An instruction
is a command to the microprocessor to
perform a given task on a specified data.
Each instruction has two parts: one is task to be performed,
called the operation code (opcode), and the second is the data to be operated on,
called the
Operand: The
operand (or data) can be specified in various ways. It may include 8-bit (or
16- bit) data, an internal register, a memory location, or 8-bit (or 16-bit)
address. In some
instructions, the operand is implicit.
Instruction word size
The 8085 instruction set is classified into the following
three groups according to word size:
1. One-word
or 1-byte instructions
2. Two-word
or 2-byte instructions
3. Three-word
or 3-byte instructions
In the 8085, "byte" and "word" are
synonymous because it is an 8-bit microprocessor.
However, instructions are commonly referred to in terms of
bytes rather than words.
One-Byte Instructions
A 1-byte instruction includes the opcode and operand in the
same byte. Operand(s) are internal
register and are coded into the instruction.
For example
These instructions are 1-byte instructions performing three
different tasks. In the first instruction, both operand registers are
specified. In the second instruction, the operand
B is specified and the accumulator is assumed. Similarly, in
the third instruction, the accumulator is assumed to be the implicit operand.
These instructions are stored in 8- bit binary format in memory; each requires one
memory location.
MOV rd, rs
rd <-- rs copies contents of rs into rd.
Coded as 01 ddd sss where ddd is a code for one of the 7
general registers which is
the destination of the data, sss is the code of the source
register.
Example: MOV A,B
Coded as 01111000 = 78H = 170 octal (octal was used
extensively in instruction
design of such processors).
ADD r
A <-- A + r
Two-Byte Instructions
In a two-byte instruction, the first byte specifies the
operation code and the second byte specifies
the operand. Source operand is a data byte immediately
following the opcode.
For example:
Assume that the data byte is 32H. The assembly language
instruction is written as
The instruction would require two memory locations to store
in memory.
MVI r,data
r <-- data
Example: MVI A,30H coded as 3EH 30H as two contiguous bytes.
This is an example of
immediate addressing.
ADI data
A <-- A + data
OUT port
0011 1110
DATA
Where port is an 8-bit device address. (Port) <-- A.
Since the byte is not the data but points
directly to where it is located this is called direct
addressing.
Three-Byte Instructions
In a three-byte instruction, the first byte specifies the
opcode, and the following two bytes
specify the 16-bit address. Note that the second byte is the
low-order address and the third byte is the high-order address. opcode + data
byte + data byte
For example:
This instruction would require three memory locations to
store in memory.
Three byte instructions - opcode + data byte + data byte
LXI rp, data16
rp is one of the pairs of registers BC, DE, HL used as
16-bit registers. The two data bytes are 16-
bit data in L H order of significance.
rp <-- data16
Example:
LXI H,0520H coded as 21H 20H 50H in three bytes. This is
also immediate addressing.
LDA addr
A <-- (addr) Addr is a 16-bit address in L H order.
Example: LDA 2134H coded as
3AH 34H 21H. This is also an example of direct addressing.
Thanks for learning........
